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| PRODUCT OVERVIEW |
Infinior MicroSystems'
IMS5016E-Meridian®
is a 16-bit cutting edge high performance
loosely coupled multiprocessor based on IMS16E
Integrated with Infinior's DSP5© digital signal
processor.
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| IMS5016E is suitable for
variety of embedded digital signal processing
applications including : |
- Voice processor for VoIP/VoDSL
- Multi-standard audio/Speech encoder/decoder
like MP3, WMA. G.7xx etc.
- Sound effect device like karaoke, equalizer
etc.
- Modems like ITU V.34/V.90, V.17, Wireless
modem etc.
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FEATURE |
| Compatibility |
- 100% software compatible with intel®
x86 real mode instructions
- DSP co-processor supports variety of
instructions suitable for highly complex
arithmetic operations
(100% compatible with TI c54XO)
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| Technology |
- Fully synchronous and static design
- 0.35um 3.3V static CMOS process
- 60Mhz operation at Dual mode (MCU+DSP)
- 80Mhz operation at MCU mode (MCU only)
- 60Mhz operation at DSP mode (DSP only)
- 3.3V I/O Pad (5V Tolerant)
- 240 Pin Plastic Quad Flat Package (PQFP)
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| Operation Modes |
- IMS5016E has three-operation mode, i.e.
MCU single mode, DSP single mode and dual
mode.
Each mode can be configured through external
or internal configurations.
When IMS5016E runs in dual mode, MCU and
DSP work as loosely coupled multiprocessor
and communicate with each other over shared
memories.
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| MCU Single mode |
- 100% software compatible with the Intel
i8086/i80186®
(Supported by widely available native
x86 development tools)
- 80Mhz operation with 3-cycle access.
(T1, T2, T3)
- Byte / Word Operation. (i80186® mode,
i80188® mode)
- 1Mbyte Memory address space, 64Kbyte
I/O space
- Peripheral Interface Logic
- Chip-Select and Ready Control Logic
- 2 Channel DMA Controllers
- 3 Programmable 16-bit Timers
- Interrupt Controller
- Refresh Control Unit
- Power Save Logic
- 2 UART Serial Ports
- General Purpose Programmable I/O (GPIO)
- SDRAM Controller
(16Mbits SDRAM Support with 4*512kbytes
with bank selection)
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| DSP Single mode |
- 16 bit Fixed Point Digital Signal Processor
- 16.7 ns single cycle execution (60 MIPS
Operation)
- 6 Stage Pipeline
(Pre-fetch, Fetch, Decoder, Access, Read,
Execute)
- Advanced Multi-bus Harvard architecture
with Three 16 bit
Data Buses and One Program Bus
- 64K words Program, Data, I/O Space.
- 4K words internal program ROM
- 10K word internal program/data Two-Port
RAM
- 40bit Arithmetic Logic Unit including
One Barrel Shifter
and Two independent 40-bit Accumulators
- 17 x 17 Parallel Multiplier Coupled
to a 40bit dedicated Adder
- Compare Select and Store Unit, Exponent
Encoder
in a Single Cycle
- Two Address Generators with Eight Auxiliary
Registers
and Two Auxiliary Register Arithmetic
Units
- Instruction with 32bit Long Word Operand
- Arithmetic Instruction with Parallel
Store and Parallel Load
- Buffered Serial Port
- Parallel Host Port Interface
- Interrupt Controller
- Timer
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| Dual mode (MCU+DSP) |
- MCU can access internal DSP memory through
Host Port Interface.
- MCU can read and write shared memory
(On chip 32kbytes Synchronous RAM)
- MCU can control shared memory occupation
with DMCR memory mapped register.
- MCU can control DSP with reset, interrupt
and DSP mode change
(microprocessor mode, microcomputer mode)
- DSP can read and write shared memory.
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| 5016E Evluation Board |

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| µ-Processor
(IMS16E ) |
| DSP
( DSP5 , DSP2) |
| Peripherals |
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INTC |
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DMAC |
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KBDC |
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PCMCIAC |
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NTSC |
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LCD |
| I/F |
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SDRAMC |
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I©÷C
Host/Target |
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UDC
(v1.1 compilant) |
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PCI
(v2.0 target device) |
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