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Eng: How can Zudra(for IMS16C)'s rom image for evaluation board
be configured to make UART 0 run in 115200bps. Kor: Zudra for dos 16C¿ëÀ» ¾²´Âµ¥ 115200bps·Î UART¸¦ µ¿ÀÛ½Ã۱â À§ÇØ
Evaluation board¿¡ ZudraÀÇ romÀ» ¾î¶»°Ô setting Çϴ°¡¿ä? |
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- English :
There's assembly code like below in setup.asm of Zudra for dos.
Following code example shows the method of 115200bps setting in
90MHz clock mode.
!
!Setting UART
!
!0xff00 + 0x0088
mov ax,#0x0018
mov dx,#0xff00 + 0x0088
out dx,ax
- According to the formula deficted in page 94 of IMS16C user's manual
it load 0x18 on the register of 0xff88 offset-address(UART 0 Baud Rate
Division Register, refer page 37 of IMS16C user's manual).
[formula]
BAUDDIV(decimal)=(Internal Core Clock Frequency/(32xBaud Rage))-1
[Hence..]
(90.3M/(32x115200))-1=> 0x18(rounding)
-0x18 was derived from this formula. So, other setting values
can be obtainde through same manner.
Korean :
Zudra for dosÀÇ setup.asmÀ» º¸½Ã¸é ¾Æ·¡¿Í °°Àº assembly code°¡ ÀÖ½À´Ï´Ù.
¾Æ·¡ÀÇ °æ¿ì 90MHz¿¡¼ 115kbps¸¦ ±¸ÇöÇϱâ À§ÇÑ ¼ÂÆÃÀÔ´Ï´Ù.
!
!Setting UART
!
!0xff00 + 0x0088
mov ax,#0x0018
mov dx,#0xff00 + 0x0088
out dx,ax
¸Þ´º¾ó¿¡ ³ª¿Í ÀÖ´Â ½Ä¿¡ µû¶ó 0xff88¹øÁö(UART 0 Baud Rate Division Register)
¿¡ 0x18À» loadÇÏ°Ô µÇ¸é, ¸Þ´º¾ó page 94¿¡¼ º¸½Ç ¼ö ÀÖ´Â ½Ä¿¡ µû¶ó¼
115200bps¸¦ settingÇÏ°Ô µË´Ï´Ù.
[½Ä]
BAUDDIV(decimal)=(Internal Core Clock Frequency/(32xBaud Rage))-1
[Áï]
(90.3M/(32x115200))-1=> 0x18(rounding) ÀÌ·¸°Ô ³ª¿Â °ªÀÌÁö¿ä.
±×·³ ´Ù¸¥ Ŭ·°¿¡ ´ëÇØ¼µµ À¯Ãß°¡ °¡´ÉÇϽðÚÁö¿ä?
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Infinior Microsystems.¢â All Rights Reserved. |
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